, ارائه روشی بهینه‌ در سنتزکننده فرکانسی کسری-N برای کاهش توان مصرفی حلقه قفل فاز با مدولاتور دلتا سیگما در رادارهای باند X

نوع مقاله : مقاله پژوهشی

نویسندگان

1 دکتری تخصصی، دانشگاه علوم وفنون هوایی شهید ستاری، تهران، ایران

2 دانشجوی دکتری، دانشگاه علوم وفنون هوایی شهید ستاری، تهران، ایران

3 دانشیار،دانشگاه جامع امام حسین(ع)،تهران،ایران

چکیده

افزایش تقاضا برای یکپارچه‌سازی مدارهای گسترده با هزینه پایین، عملکرد با توان مصرفی پایین در قالب یک تراشه یکی از مهم‌ترین مسائل روز برای طراحان شده است. از‌این‌رو تلاش‌های فراوانی برای ساخت مدارات و سیستم‌های مجتمع شده‌ی RF در محدوده فرکانسی گیگاهرتز و با استفاده از فنّاوری CMOS انجام‌گرفته است. اساساً استفاده از سنتزکننده‌های فرکانسی مبتنی بر حلقه‌های قفل فاز یکی از مهم‌ترین بلوک‌های سازنده‌ی یک فانکشن ژنراتور است، که وظیفه‌ی تولید سیگنال حامل را داشته و یکی از مهم‌ترین و حساس‌ترین بلوک‌های فانکشن ژنراتور است؛ چون‌ در فرکانس‌های بالا کار می‌کند و سهم مصرف توان آن در فانکشن ژنراتور زیاد است. در این پژوهش یک طراحی و شبیه‌سازی سنتزکننده فرکانسی در نرم‌افزار Cadence RF-Spectre جهت استفاده در رادارهای باند X پیاده‌سازی شده است. نتایج این پژوهش نشان می‌دهد تکنیک خطی‌سازی جدید طراحی‌شده جریان‌های CP در مقایسه با جریان CP بدون تکنیک خطی‌سازی مطابقت بالایی دارد و حداکثر عدم تطابق حدود0.4 میکروثانیه در ولتاژ کنترل بین 0.2 تا 1.6 ولت است. مصرف برق کسری-N طراحی شده حدود 6.579 میکرو وات با یک منبع تغذیه 1.8 ولتی است در سنتزکننده، نویز فاز VCO با فرکانس حامل 10 گیگاهرتز، در آفست 1 مگاهرتز برابر dBc/Hz 106- است و همچنین توان منابع باند جانبی به‌ dBc55 -کوتاه‌تر از سیگنال حامل (در فرکانس 10.004 گیگاهرتز) رسیده است.

کلیدواژه‌ها

عنوان مقاله [English]

Presenting an Optimal Method of a Fractional-N Synthesizer to Reduce the Power Consumption of the Phase-Locked Loop with Delta-Sigma Modulator in x-Band Radars

نویسندگان [English]

  • Houman Akbarzade Khoshkeh Roud 1
  • saeed Talati 2
  • Seyed Mohammad Alavi 3
1 PhD, Shahid Sattari University of Aeronautical Sciences and Technology, Tehran, Iran
2 PhD student, Shahid Sattari University of Aeronautical Sciences and Arts, Tehran, Iran
3 Associate Professor, Imam Hossein University, Tehran, Iran
چکیده [English]

Increasing demand for the integration of wide circuits with low cost, and performance with low power consumption in the form of a chip has become one of the most important issues of the day for designers. Therefore, many efforts have been made to build RF integrated circuits and systems in the GHz frequency range using CMOS technology. The use of frequency synthesizers based on phase lock loops is one of the most important building blocks of a function generator, which has the task of producing the carrier signal and is one of the most important and sensitive function blocks of the generator; Because it works at high frequencies and the contribution of its power consumption in the generator function is high. This research has implemented a design and simulation of a frequency synthesizer for use in X-band radars. The results of this research show that the newly designed linearization technique of CP currents has a high compliance compared to the CP current without linearization technique, and the maximum mismatch is about 0.4 microseconds in the control voltage between 0.2 and 1.6 volts. The designed fractional-N power consumption is about 6.579 μW with a 1.8 V power supply. In the synthesizer. The phase noise of the VCO with a carrier frequency of 10 GHz, at an offset of 1 MHz is equal to -106 dBc/Hz. The power of the sideband sources is 55 dBc - shorter than the carrier signal (at a frequency of 10.004 GHz) it arrives.

کلیدواژه‌ها [English]

  • X band
  • Phase Locked Loop
  • phase noise
  • Loop Filter
  • Fractional-N

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مراجع

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رادار
دوره 11، شماره 1
شماره پیاپی 29، فصلنامه بهار و تابستان
شهریور 1402

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سابقه مقاله

  • تاریخ دریافت: 01 خرداد 1402
  • تاریخ بازنگری: 08 تیر 1402
  • تاریخ پذیرش: 13 مرداد 1402
  • تاریخ انتشار: 02 شهریور 1402

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